Location: Mayer 352, Tuesdays 11.30-14.30.
Note that the hours each week will be split between tutorials and lectures differently (sometimes only lectures, sometimes only tutorials)
Purpose:
The purpose of this course is to expose the world of computational and I/O accelerators, their architectural properties, programming models, interaction with them and between them, OS support for accelerators and on accelerators, and finally basic principles of building accelerated systems. Students will apply these abstract ideas on GPUs by studying advanced General Purpose GPU computing using NVIDIA CUDA on real hardware. We will also talk about (and practice a bit) Infiniband NICs, P4 PISA Switches and other accelerator technologies.
This course requires strong background in OS and processor architecture. Students without the Intro to OS and Intro to Computer Architecture must coordinate their participation with the lecturer.
This is not a "how to program a GPU" course, it is geared toward understanding the principles of building accelerated systems, with a comprehensive and in-depth study of existing practices as well as to identify the topics for future research.
Grading structure:
Three coding assignments - 2x NVIDIA CUDA and 1x Infiniband : (each 7% -- takef)
Final exam (79%)
The final grade will include the grades of the home assignments only for those who pass the exam.
Graduate students may be permitted to complete a small research project as a replacement for the exam
- מורה: מרק זילברשטיין
- מורה: רון מרכוס